Conference trip to DATE in Dresden

A short walk from the conference venue is the Kronentor gate of the Zwinger palace.

This year the Design, Automation and Test in Europe conference (DATE) takes place in Dresden, Germany. I had the chance travel to Dresden to demonstrate our recent work RISC-V processor modeling in IP-XACT using Kactus2 at the University Booth. The modeling target is PULPino, a 32-bit RISC-V single-core microcontroller, whose structure and configurations we capture with our open-source graphical IP-XACT design environment Kactus2, The modeling is still a work-in-progress and already covers almost 200 IP-XACT XML files which are available in GitHub. Once completed, the model makes it  easy to integrate PULPino into new designs for e.g. IoT devices. It also serves as a public example of IP-XACT use in a decently complex application, something we have been lacking for years despite the fact that IP-XACT is widely accepted as the industry standard for IP packaging.

Me at the University Booth.

The University Booth exhibits both hardware and software demonstrators and provides a great forum for discussing ongoing research topics. The booths display a great variety of topics: electronic design automation, analog design, mixed-signal design, neural network controllers for autonomous robots, wireless sensor systems and many more. Most demonstrators also run live on a prototype and the tables were served with a wide range of platforms from Raspberry Pis to FPGAs.

After three days at the University Booth, I attended the Embedded Software for Industrial IoTs (ESIIT) workshop on the final day of the conference. This was the first time ESIIT was organized as part of the conference and proved out to be a success with a lot of submissions, attendees and active discussion. The day was filled with great talks, poster presentations and discussion around the broad topic of industrial IoTs. A lot of attention was given to modeling and meta-modeling as a part of the design flow, firmware optimizations and power management. My invited talk Bridging the Gap between Hardware Description Languages and IP-XACT focused on easing the transition of legacy code bases to IP-XACT supported design flow.

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