The Euromicro Digital System Design (DSD)/Software Engineering and Advanced Application (SEAA) conference in Prague displayed a wide spectrum of ongoing research activities and topics. Our lab had six participants this year attending both the SEAA and DSD sides of the joint conference: Valentina Lenarduzzi, Davide Taibi, Sampo Suonsyrjä, Mikko Teuho, Esko Pekkarinen and Markku Vajaranta.
On the first conference day, Tuesday, the posters were put up and presented. Markku presented his poster titled Feasibility of FPGA Accelerated IPsec on Cloud as a part of the Architectures and Hardware for Security Applications track.
IPsec is a popular VPN solution which in some cases becomes very resource-hungry. The work presented how the packet encryption and decryption parts can be accelerating using an FPGA and what real life limitations production-ready solutions face.
Mikko had a poster prepared and presented his work titled Visualization of Memory Map Information in Embedded System Design. Data representation and compression must consider how to visually represent the domain specific artifacts, how to filter data based on context and user, and how to fit and navigate the information in the limited screen space. A detailed approach is needed to detect changes, discover error situations and explore the different choices of changeable items. We presented a method that has been implemented as a Memory Designer tool for ASIC, FPGA and embedded systems using the IP-XACT standard. The presented method compresses the initial visualization, retaining the same information as the original, and provides access and adjustment of the memory layout from a single view, complementing the “programmer’s view” to the system.
Even though the DSD conference is more hardware oriented, it is good to see the growing interest in the security aspects as well. Unfortunately, the poster session itself was quiet and only few visited the posters during the session. We suspect it was because of the very good coffee served in the conference while the poster sessions were on.
On the SEAA side, Sampo presented his paper Objectives and Challenges of the Utilization of User-Interaction Data in Software Development on Thursday. The study covered the work our group had done with three software teams from the industry and the N4S research program and consisted of three parts. First was designing an utilization method for software teams that want to start using more user-interaction data in their daily work. The second part listed objectives for the teams of how to analyze the collected data and where to use it. Finally, in the third part we interviewed our case teams and described what kind of challenges they had faced with starting the use of user-interaction data for guiding the software processes. The results got the attention of the audience and for example the challenges were similar to the experiences of some of the listeners.
The Evidence Based and Experiment Driven Engineering (EBEDE) session was really well organized: It tightly focused on software usage data and how software development could be arranged as continuous experimentation. No wonder the room was pretty much packed!
If you got interested in using usage data or in continuous experimentation in general, please feel free to contact Sampo (mailto:firstname.lastname@example.org) for more info.
The conference dinner on Thursday evening was preceded by a guided walk tour in the city. In 90 minutes we got introduced to the main sights in and around the Old Town. At the dinner venue, the Kaiserstein palace, we were seated in a grand hall for a short live concert of classical music before the evening truly celebration began. The evening program captured the essence of Prague very nicely: history, architecture and music.
On Friday we jump back to DSD, where Esko presented his paper Modeling RISC-V processor in IP-XACT. Despite IP-XACT’s wide popularity in the industry, there are practically no public and open design examples for any part of the design flow. We have identified the difficulty of creating IP-XACT models for existing RTL projects as one of the major inhibitors. In this work, we address the issues by modeling the PULPino RISC-V microprocessor that is implemented in SystemVerilog and where the project is distributed over several repositories. We propose how to solve the mismatching concepts between a SystemVerilog-based project and IP-XACT for easier packaging of future projects. The final PULPino model contributes to the rare public non-trivial examples for better adoption of the IP-XACT methodology.
In the afternoon Davide and Valentina presented their paper Microservices, Continuous Architecture, and Technical Debt Interest: An
Empirical Study in the SEAA Work-in-progress track. Continuous architecting recommends postponing decisions until they are absolutely necessary. This approach is especially applied in the context of migration of microservices. In this work, we conducted a preliminary case study to understand the trend of technical debt monitoring of an SME that migrated its monolithic system to microservices. The result is that the total amount of technical debt grows much faster in a microservices-based system, probably due to the large number of postponed refactoring activities. The migration to microservice initially increase the amount of technical debt and the more the activities are delayed, the more interest will be accrued.
Once more, thank you all for the great conference trip. Hope to meet you in DSD/SEAA next year!