New FPGA+ARM boards

We have brand new Terasic VEEK-MT-C5SoC  development boards for teaching hardware design and embedded programming. The board contains Altera Cyclone V SoC, 7” multi-touch touchscreen, gigabytes of fast memories, a 5mpix camera, Ethernet, USB, UART, JTAG etc. connections. The SoC contains FPGA and a 925 MHz dual-core ARM Cortex-A9 Hard Processor System (HPS) on the same chip. The boards are located in the computer class TC221.

The FPGA is a programmable digital logic that allows implementing custom high speed digital system, e.g. graphic accelerator, specialized signal processor, video encoder, or even a software defined radio. The possibilities are unlimited. The FPGA is connected to the ARM through a high speed AXI bus. The ARM can run Linux, custom made “baremetal” C, or assembly programs.

CycloneV SoC contains both FPGA logic and dual-core ARM Cortex-A9

CycloneV SoC contains both FPGA logic and dual-core ARM Cortex-A9

The first course using the board is the freshman course TIE-05200 Mikroprosessorit (Microprocessors) on autumn 2014. Currently, there are over 200 registered students. Students will implement a speed test game. The player must press the buttons in correct order as the speed increases all the time. The exercise teaches embedded C programming, timer, interrupt, and memory mapped peripheral usage. The program is baremetal C, i.e without any operating system, and uses ready-made example project that initializes the ARM with u-boot. Altera interrupt library for setting up the interrupt sources and callbacks to the interrupt service routine are also included.

Students working with Terasic/Altera VEEK boards

Students working with Terasic/Altera VEEK boards

The game user interface is emulated on the touchscreen and contains four 7 segment displays for the points and the buttons that can be light up. Basic primitives of the GUI have been implemented on the FPGA and ARM can access them as a memory-mapped device. Moreover, the GUI system contains a top level menu, where the student can select the emulated physical UI needed in the exercise. Then the emulated UI is presented and the student implementation can run the application logic either on the FPGA or on the ARM.

The video demo presents the GUI running on the FPGA and an example implementation of the speed test game logic running on the ARM for the course TIE-05200 Mikroprosessorit. The rest of the hardware and embedded programming courses (e.g. Logic synthesis and System design) start using the same VEEK board within the next year.

Text, photo and video by Teemu Laukkarinen. (Minor editing by ES).

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